@IEEE micro, FALL 2020, Condensa Paper
@NVIDIA research, Summer 2020
@NVIDIA GTC 2020, TALK - march 25th 9am
Our recent work Condensa: A Programming System for Model Compression was accepted as a Talk!
for the GPU Technology Conference (GTC) Silicon Valley, 2020.
Session Type: Talk
Length: 50 minutes
Venue : GTC takes place March 22-26, 2020 at the San Jose McEnery Convention Center in San Jose, California
@NSF PPI on IoT Devices, Condensa talk, MARCH 2020
NVLabs/Condensa for Internet of Things Focused Research Center
Internet of Things (IoT) marks the dawn of a technological revolution that rivals the industrial revolution. In this new era, intelligent computing becomes anticipatory, proactive, and adaptive.
The next big growth in IoT systems will come from pushing Pervasive Personalized Intelligence (PPI) in everyday devices to learn and dynamically support our preferences and lifestyles at home, at work and on the move.
A proposed new multi-university, industry-focused PPI center, headquartered at Oregon State University and a site at University of Colorado Boulder, will be supporting research under the supervision of the U.S. National Science Foundation (NSF) using the NSF IUCRC Model. Associate Professor, Danny Dig, at OSU College of Engineering, the executive director of the new center, says “This research will enable a new class of applications with intelligence that is predictive instead of reactive. we want to make processes more efficient and save time, energy, and money.”
The Center would allow for interdisciplinary research on machine-learning based software systems and aid in long-term partnerships between startups, corporations, universities and government agencies. Read more at https://ppicenter.org/
@GE HEALTHCARE, Condensa for Health CARE Devices, FEBruary 2020
Healthcare Systems: GE provides medical technologies, digital infrastructure, data analytics and decision support tools that help healthcare professionals diagnose, treat and monitor their patients. They also provide services, accessories, consumables, education, training and consulting.
Life Sciences: GE helps therapy innovators, researchers and healthcare providers accelerate how precision diagnostics and therapies are invented, made and used. Their products enable biological analysis, research, development and the manufacture of advanced therapies and vaccines. GE also produce pharmaceutical diagnostics used in medical imaging.
Detail Coming Soon
@CMR Institute of Technology, Talk on the state of ai and ABOUT Pursuing MS/PhD in AI, 20th FEB 2020
Prajavani, 20th Feb 2020, Page No 03 Metro.
Deccan Herald, 20th Feb 2020, Page No 02.
@UtahSOC, FALL 2019
This was a recognition for our team work with Dr. Michael Garland (NVIDIA Research), Dr. Saurav Muralidharan (NVIDIA Research) and Prof. Animesh Garg (University of Toronto/NVIDIA)
and the advice, mentorship I received from my advisors: Prof. Ganesh Gopalakrishnan , Prof. Mary Hall, Prof. Aditya Bhaskara, Prof. Vivek Srikumar all at the School of Computing, University of Utah, Salt Lake City, UT, USA.
MENTEE receives CRA Outstanding Undergraduate Researcher mention
This award program recognizes undergraduate students in North American colleges and universities who show outstanding research potential in an area of computing research. Click here for nomination information.
Mark Van der Merwe received this honorable mention for research conducted on Message Scheduling for Performant, Many-Core Belief Propagation, We also presented this at NVIDIA GTC 2018 in San Jose
@Neural Information Processing Systems, Vancouver, British Columbia December 2019
The core focus is peer-reviewed novel research which is presented and discussed in the general session, along with invited talks by leaders in their field.
Neural Information Processing Systems annual meeting is to foster the exchange of research on neural information processing systems in their biological, technological, mathematical, and theoretical aspects. (Top) Yoshua Bengio speaks about moving from System 1 Deep Learning to System 2 Deep Learning. (Below) He was one amoung us in terms of Scientific Curiosity (with a back-pack)
@BayLearn 2019 Symposium at Pinterest in San Francisco:
October 16th, 2019
The BayLearn Symposium aims at gathering scientists in machine learning from the San Francisco Bay Area. While it promotes community building between local researchers from academic and industrial institutions, it also welcomes visitors. This one-day event combines invited talks and posters to foster exchange of ideas.
Samy Bengio, Google Research, Brain Team
David Grangier, Google Research, Brain Team
Isabelle Guyon, ClopiNet
Alexei Pozdnukhov, Sidewalk Labs
Mohak Shah, LG Electronics
Jerremy Holland, Apple Inc.
Jean-Francois Paiement, AT&T Research
Sudarshan Lamkhede, Netflix Research
Dr. Daphne Koller gave a keynote about "Machine learning: a new approach to drug discovery"
Modern medicine has given us effective tools to treat some of the most significant and burdensome diseases. At the same time, it is becoming consistently more challenging to develop new therapeutics: clinical trial success rates hover around the mid-single-digit range; the pre-tax R&D cost to develop a new drug (once failures are incorporated) is estimated to be greater than $2.5B; and the rate of return on drug development investment has been decreasing linearly year by year, and some analyses estimate that it will hit 0% before 2020. A key contributor to this trend is that the drug development process involves multiple steps, each of which involves a complex and protracted experiment that often fails. We believe that, for many of these phases, it is possible to develop machine learning models to help predict the outcome of these experiments, and that those models, while inevitably imperfect, can outperform predictions based on traditional heuristics. The key will be to train powerful ML techniques on sufficient amounts of high-quality, relevant data.
ACM The 28th International Symposium on High-Performance Parallel and Distributed Computing Finalist for Best Paper Award, 2019
Belief Propagation (BP) is a message-passing algorithm for approximate inference over Probabilistic Graphical Models (PGMs), finding many applications such as computer vision, error-correcting codes, and protein-folding. While general, the convergence and speed of the algorithm has limited its practical use on difficult inference problems. As an algorithm that is highly amenable to parallelization, many-core Graphical Processing Units (GPUs) could significantly improve BP performance. Improving BP through many-core systems is non-trivial: the scheduling of messages in the algorithm strongly affects performance. We present a study of message scheduling for BP on GPUs.
We demonstrate that BP exhibits a tradeoff between speed and convergence based on parallelism and show that existing message schedulings are not able to utilize this tradeoff.
To this end, we present a novel randomized message scheduling approach, Randomized BP (RnBP), which outperforms existing methods on the GPU.
@NVIDIA Research, Spring 2019
DNN Model compression is a critical technique to efficiently deploy neural network models on mobile devices which have limited computation resources and tight power budgets.
Conventional model compression techniques rely on hand-crafted heuristics and rule-based policies that require domain experts to explore the large design space trading off among model size, speed, and accuracy, which is usually sub-optimal and time-consuming.
In collaboration with Nvidia Research, we developed Bayesian Optimization based automation into our Programming System for DNN Model Compression.
Checkout our our paper for more details: https://arxiv.org/abs/1911.02497
@UtahSoc FalL 2018, High Passed Quals! Now a PhD Candidate in CS.
@NVIDIA Research, Summer 2018
In collaboration with Nvidia Research, we developed A Programming System for Model Compression called Condensa.
Condensa is a framework for programmable model compression in Python. It comes with a set of built-in compression operators which may be used to compose complex compression schemes targeting specific combinations of DNN architecture, hardware platform, and optimization objective. To recover any accuracy lost during compression, Condensa uses a constrained optimization formulation of model compression and employs an Augmented Lagrangian-based algorithm as the optimizer.
Status: Condensa is under active development, and bug reports, pull requests, and other feedback are all highly appreciated.
Our work on accelerating Probabilistic Graphical Models was selected in GTC 2018, this work went on to be a finalist for Best Paper award in 2019.
Meeting with my CUDA guru. Dr. David Luebke and Vice President of Graphics Research NVIDIA Corporation
Spring 2018, My first lecture on efficiently parallelizing k-means on GPU.
K-means is a popular clustering algorithm that is not only simple, but also very fast and effective, both as a quick hack to preprocess some data and as a production-ready clustering solution.
Prof. Ganesh encouraged me to lecture his students on efficiently parallelizing k-means on GPU using CUDA C++
The International Conference for High Performance Computing, Networking, Storage and Analysis.
We are organizing the very First International workshop in Software Correctness for HPC Applications Correctness 2017!
The goal of the Correctness Workshop is to bring together researchers and developers to present and discuss novel ideas to address the problem of correctness in HPC.
The workshop will feature contributed papers and invited talks in this area.
The International Conference for High Performance Computing, Networking, Storage and Analysis.
I represented the School of Computing, University of Utah, Salt Lake City. Supporting the overall conference and conference attendees.
Undergraduate and graduate student volunteers help with the administration of the conference and had the opportunity to participate in student-oriented activities, including professional development workshops, technical talks by famous researchers and industry leaders, exploring the exhibits and developing lasting peer connections.
Summer 2016, @Stanford research Institute Menlo Park.
Sixth Summer School on Formal Techniques 2016 Menlo College, Atherton, CA, USA
I was introduced to techniques based on formal logic, (such as model checking, satisfiability, static analysis, and automated theorem proving) are was interested in these as they are finding a broad range of applications in modeling, analysis, verification, and synthesis. This school, the sixth in the series, focused on the principles and practice of formal techniques, with a strong emphasis on the hands-on use and development of this technology.
fun time experimenting with the tools and techniques presented during laboratory sessions.
June 2016, Design Automation Conference, Austin
Fall 2015, Started Graduate Studies in Computer Science! @UtahSoc
Joined the Center for Parallel Computing in the University of Utah.
Wrapping up a rewarding career at ARM!
ARM (M) series processors are Optimized for cost and power sensitivity and mixed-signal devices for applications such as Internet of Things, connectivity, motor control, smart metering, human interface devices, automotive and industrial control systems, domestic household appliances, consumer products and medical instrumentation.
Started a project, Towards formal verification of v8M designs. It was during this time in the Project, that I was feeling the need to take Advanced courses in CS and Joined the Center for Parallel Computing in the University of Utah.
ARM @ Intel VLSI Design 2015
The 28th International Conference on VLSI Design and 14th International Conference on Embedded Systems was held during January 3-7, 2015 at Bengaluru, Karnataka, India.
The theme for the conference this year is “IoT – Building a Smart Connected world”. This 5 day conference comprises of : Tutorials during the first two days, followed by 3 days of conference.
I represented ARM Inc. to Showcase our Mbed IoT Platform as things “all that we need”" to develop IoT devices and applications. tools for writing, building and testing applications, and server and client-side tools to communicate with devices.
2014 Recipient of The ARM Bravo award.
Richard Grisenthwaite (left), SVP, Chief Architect & Fellow, Arm.
Richard Grisenthwaite (An Arm veteran) has spent 21 years evolving the Arm architecture and has led architectural development since the introduction of Armv6 in 2001!
During his tenure at ARM, I was a recipient of the Bravo award for developing the programmer’s model for verifying real-time (‘R’) profile architecture which provides high-performing processors for safety-critical environments.
Arm produces a whole family of processors that share common instruction sets and programmer’s models and have some degree of backward compatibility.
The Armv8-R architecture introduces a number of features that allow you to design and implement high-performing processors for safety-critical environments. These include:
No overlapping memory regions.
New exception model that is compatible with the Armv8-A model.
Virtualization with support for guest operating systems.
Optionally, support for double-precision floating-point and Advanced SIMD.
@ARM Cambridge, Global Graduate Conference GGC 2012
July 2011, Starter First Job at ARM Inc.
ARM supplies of microprocessor technology, offering a range of microprocessor cores to address the performance, power and cost requirements for almost all application markets.
It certainly has vibrant ecosystem with more than 1,000 partners delivering silicon, development tools and software, and with more than 90 billion+ processors shipped.
July 2011 Completed Undergraduate Studies!
Decided to graduate from CMRIT (above) in 2011 and Accept the Job offer from ARM Inc !
@VT Univ. Fall 2010 FPGA at National Aerospace Lab (NAL).
I worked at NAL as an Undergraduate Research Assistant in 2011, in the Flosolver Parallel computing lab.
Flosolver Parallel Computing Lab CSIR-NAL built India’s first parallel computer, Flosolver Mk 1, in 1986. The current Flosolver Mk8 is a customised parallel supercomputer for numerical weather prediction using in-house developed communication devices. The objective of this programme was to build an integrated Hardware -Software modeling platform consisting of 10 Teraflops, 1024 processor parallel supercomputer.
During my tenure at NAL, I worked on one project.
64-bit Floating Poiut Unit Design and Verification
Detailed Study and Presentation of The IEEE Standard for Floating-Point Arithmetic (IEEE 754)
1985 and 2008 updates of radix-independence
VHDL Implementation for Floating Point Operations.
Random C based test harness generator.
Project Report and Verified Design submitted to NAL and VTU.
@VT Univ. Spring 2009 Intel embedded challenge
Intel Higher Education Program, in collaboration with Embedded and Communication Group (ECG) of Intel Technology India Pvt. Ltd., presented the Intel India Embedded Challenge 2010 – An Embedded design contest for students, interested individuals & entrepreneurs from all over India. This contest was been put forward to inspire the vast technically savvy community in India to architect, design and develop novel embedded applications in areas such as: Consumer Electronics, Digital Security Surveillance, Medical, Storage & others.
In collaboration with National Aerospace Lab, we worked on the Medical Image Fusion Project on the Intel® Atom Processors for embedded computing. Embedded Geeks Category
@VT Univ. Fall 2008, Awards etc. I enjoyed my Undergraduate Studies..
Prof. Erwin was also a distinguished author, having written the textbook Advanced Engineering Mathematics, the leading textbook for civil, mechanical, electrical, and chemical engineering undergraduate engineering mathematics.
I was obsessed by the clarity in these books and landed up scoring 100/100 back-to-back in these university examinations in Advanced Engineering Mathematics, This resulted in 1st rank in my University.
Love for Erwin Kreyszig, This legend passed away in this same year, 2008 :(
Award from Education Minister of the State
@VT Univ. Fall 2007 started undergraduate studies!
CMRIT was founded in 2000 by CMR Jnanadhara Trust. It offers courses like Bachelor of Engineering, Master's degree, MCA, MBA and Doctoral programs.
@KV NAL, Spring 2007 senior year, graduated!
I was in this Campus for 12 solid years! 1995 - 2007
This project sector KV was patronised by the premier scientific giants National Aerospace Lab and Indian Space Research Organization. This vidyalaya was started in 1981.
With a student strength of 1414 and staff of 56 it functions from its well designed and maintained campus in Vimanapura spread over an area of approx. six acres. This vidyalaya boasts of excellent infrastructure and facilities.
Over the decades this vidyalaya has striven to contribute its share in developing a progressive society. While the school strives to tread its path of academic thoroughness with zeal and scientific outlook, it keeps the vision of KVS in focus to send into the world young men and women with a world vision.
@KV NAL, 1st place Fall 2006 Intercollegiate Math Fest!
Along with 2 of my best friends, we went to our rival school :) The National Public School Indiranagar and defeated them in their own Math Fest!
It was a team effort, with Darbha Sri Harha (bottom) and Vishwa Theja (top). The three of us studied together for 12 years at KV NAL, Bangalore.
We were in 11 grade, during this inter collegiate Math Fest, a very memorable day indeed.
@KV NAL, 2004, award from The Director National Aerospace Lab.
The Government of India is responsible for ensuring the defence of India and every part thereof. The Supreme Command of the Armed Forces vests in the President. The responsibility for national defence rests with the Cabinet. This is discharged through the Ministry of Defence, which provides the policy framework and wherewithal to the Armed Forces to discharge their responsibilities in the context of the defence of the country. The Raksha Mantri (Defence Minister) is the head of the Ministry of Defence. It was a privileged to be recognized and awarded a cash prize from the advisor to the Defense Minister and the director of NAL for my performance in All India Secondary School Examinations.
@KV NAL, 2003, First SCIENCE PROJECT award
Designed a automatic switching circuit that used to control an AC water pump. Operation of this circuit is simple, When the water level goes below the limit the lower level sensor will detect it and activate the water pump. When the water level reaches the upper limit the upper limit sensor detect it and switch of the water pump.
@KV NAL, 2001, mom got me to memorize the periodic table.
2001 is the year, I developed an interest in Science. My paternal grandfather was a statistician and worked for the British Govt. in India, and My father was a Scientist in National Aerospace Laboratories (NAL), it is India's first largest aerospace firm. It was established by the Council of Scientific and Industrial Research (CSIR) at Delhi in 1959 and its headquarters was later moved to Bangalore in 1960. The firm closely operates with HAL, DRDO and ISRO and has the prime responsibility of developing civilian aircraft in India. The CSIR-NAL mandate is to develop aerospace technologies with strong science content, design and build small and medium-sized civil aircraft, and support all national aerospace programmes. I owe my interest in science to my mother, who was the one who got me interested in Science. and to my father who left me to wander in the NAL library on almost all weekends as a kid.
@NAL NS, 1994, DAD got me to memorize dialogues
"The two most important days in your life are the day you are born and the day you discover why" -- Mark Twain
@NAL NS, 1992 - first gift ever
Probably my first award, unable to recall the reason. The presenter was a Scientist from NAL, The background has 2 of my School teacher, whom I am still in touch with Mrs. Nirmala (left) and Mrs. Usha (right)
If you understand Albert Einstein's work on the definition to Time, You will appreciate the significance of this illustration from Brian Green's "The Fabric of the Cosmos".